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 E2E0056-19-62
Semiconductor MSM63188A
Semiconductor
This version: Jun. 1999 MSM63188A
4-Bit Microcontroller with Built-in 1024-Dot Matrix LCD Drivers and Melody Circuit, Operating at 0.9 V (Min.)
GENERAL DESCRIPTION
The MSM63188A is an enhanced version of the MSM63188 in which supply currents have been improved. The MSM63188A is a CMOS 4-bit microcontroller with built-in 1024-dot matrix LCD drivers and operates at 0.9 V (min.). The MSM63188A is suitable for applications such as games, toys, watches, etc. which are provided with an LCD display. The MSM63188A is an M6318x series mask ROM-version product of OLMS-63K family, which employs Oki's original CPU core nX-4/250. The MSM63P180 is the one-time-programmable ROM version of MSM63188/A, having one-time PROM (OTP) as internal program memory. The MSM63P180 is used to evaluate the software development.
FEATURES
* Rich instruction set 439 instructions Transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations, mask operations, bit operations, ROM table reference, external memory transfer, stack operations, flag operations, branch, conditional branch, call/return, control. * Rich selection of addressing modes Indirect addressing of four data memory types, with current bank register, extra bank register, HL register and XY register. Data memory bank internal direct addressing mode. * Processing speed Two clocks per machine cycle, with most instructions executed in one machine cycle. Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock) 1 ms (@ 2 MHz system clock) * Clock generation circuit Low-speed clock High-speed clock
: 32.768 kHz crystal oscillator : 2 MHz (Max.) RC or ceramic oscillator select
* Program memory space 16K words Basic instruction length is 16 bits/1 word * Data memory space 3584 nibbles * External data memory space 64 Kbytes (expandable by using an I/O port) 1/32
Semiconductor * Stack level Call stack level Register stack level
MSM63188A
: 16 levels : 16 levels
* I/O ports Input ports: Selectable as input with pull-up resistance/input with pull-down resistance/ high-impedance input Output ports: Selectable as P-channel open drain output/N-channel open drain output/ CMOS output/high-impedance output Input-output ports: Selectable as input with pull-up resistance/input with pull-down resistance/high-impedance input Selectable as P-channel open drain output/N-channel open drain output/CMOS output/high-impedance output Can be interfaced with external peripherals that use a different power supply than this device uses. Number of ports: Input port : 2 ports 4 bits Output port : 6 ports 4 bits Input-output port : 6 ports 4 bits * Melody output function Melody sound frequency Tone length Tempo Note data Buzzer drive signal output
: : : : :
529 to 2979 Hz 63 types 15 types Resides in the program memory 4 kHz
* LCD driver Number of segments : 1024 Max. (64 SEG 16 COM) 1/1 to 1/16 duty 1/4 or 1/5 bias (regulator built-in) Selectable as all-on mode/all-off mode/power down mode/normal display mode Adjustable contrast * Multiplier/divider circuits Multiplier : (8 bits) (8 bits) AE Product (16 bits) Divider : (16 bits) / (8 bits) AE Quotient (16 bits), Remainder (8 bits) * Reset function Reset through RESET pin Power-on reset Reset by low-speed oscillation halt * Battery check Low-voltage supply check Criterion voltage
: Can be selected as 1.05 0.10 V, 1.30 0.15 V, 2.20 0.20 V or 2.80 0.30 V
* Power supply backup Backup circuit (voltage multiplier) enables operation at 0.9 V minimum
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Semiconductor
MSM63188A
* Timers and counter 8-bit timer 4 Selectable as auto-reload mode/capture mode/clock frequency measurement mode Watchdog timer 1 Overflows in 2 sec. 100 Hz timer 1 Measurable in steps of 1/100 sec. 15-bit time base counter 1 1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read * Serial port Mode UART communication speed Clock frequency in synchronous mode Data length * Interrupt sources External interrupt Internal interrupt
: UART mode, synchronous mode : 1200 bps, 2400 bps, 4800 bps, 9600 bps : 32.768 kHz (internal clock mode), external clock frequency : 5 to 8 bits
:4 : 13 (watchdog timer interrupt is a nonmaskable interrupt)
* Operating voltage When backup used
When backup not used
: 0.9 to 2.7 V (Low-speed clock operating) 1.2 to 2.7 V (Operating frequency: 300 to 500 kHz) 1.5 to 2.7 V (Operating frequency: 200 kHz to 1 MHz) : 1.8 to 5.5 V (Operating frequency: 300 to 500 kHz) 2.2 to 5.5 V (Operating frequency: 300 kHz to 1 MHz) 2.7 to 5.5 V (Operating frequency: 200 kHz to 2 MHz)
* Package: 176-pin plastic LQFP (LQFP176-P-2424-0.50-BK) : (Product name: MSM63188A-xxxGS-BK) Chip : (Product name: MSM63188A-xxx) xxx indicates a code number.
Differences Between the MSM63188 and the MSM63188A
The MSM63188A has the following improved characteristics. * Supply currents (IDD1, IDD2, IDD3) in DC characteristics * The VDDL voltage during a halt of high-speed clock oscillation
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Semiconductor
MSM63188A
BLOCK DIAGRAM
An asterisk (*) indicates the port secondary function. indicates that the power is supplied to the circuits corresponding to the signal names inside from VDDI (power supply for interface).
nX-4/250
CBR H L RA PC
TIMING CONTROL
ROM 16KW
EBR SP RSP
X
Y C
A G MIE Z BUS CONTROL EXTMEM A0-15* RD* WR* IR
ALU
D0-7*
STACK CAL : 16-level REG : 16-level
INSTRUCTION DECODER
INT 4 RAM 3584N INT 2 INT188 SIO INT 1 MULDIV INT TST1 TST2 TST 4 TBC MELODY TIMER 8bit 4 TM0CAP/TM1CAP* TM0OVF/TM1OVF* T02CK* T13CK* RXC* TXC* RXD* TXD* MD MDB
RESET
RST
DATA BUS
INT 1 INPUT PORT P0.0-P0.3 P1.0-P1.3
XT0 XT1 OSC0 OSC1 TBCCLK* HSCLK*
BLD P2.0-P2.3 OSC INT 1 100HzTC OUTPUT PORT P3.0-P3.3 P4.0-P4.3 P5.0-P5.3 WDT P6.0-P6.3 P7.0-P7.3
INT 1
VDDH VDD CB1 CB2 VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDL
LCLK* FRAME* LCD & DSPR BIAS INT 3 BACK UP I/O PORT
P8.0-P8.3 P9.0-P9.3 PA.0-PA.3 PB.0-PB.3 PC.0-PC.3 PD.0-PD.3
COM1-16 SEG0-63
VDDI VSS
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Semiconductor
MSM63188A
PIN CONFIGURATION (TOP VIEW)
(NC) SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 (NC) P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 P3.3 P4.0 P4.1 P4.2 P4.3 (NC) (NC) 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133

SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89
P5.0 P5.1 P5.2 P5.3 P6.0 P6.1 P6.2 P6.3 P7.0 P7.1 P7.2 P7.3 P8.0 P8.1 P8.2 P8.3 P9.0 P9.1 P9.2 P9.3 PA.0 PA.1 PA.2 PA.3 PB.0 PB.1 PB.2 PB.3 PC.0 PC.1 PC.2 PC.3 PD.0 PD.1 PD.2 PD.3 (NC) (NC) (NC) (NC) (NC) (NC) (NC) (NC)
Note: Pins marked as (NC) are no-connection pins which are left open.
(NC) COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 VSS VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDH CB1 CB2 VDD VDDL OSC1 OSC0 RESET XT1 XT0 TST2 TST1 (NC) (NC) MD MDB (NC) VDDI (NC)
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
176-Pin Plastic LQFP
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Semiconductor
MSM63188A
PAD CONFIGURATION
Pad Layout
VDDI MDB MD TST1 TST2 XT0 XT1 RESET OSC0 OSC1 VDDL VDD CB2 CB1 VDDH C2 C1 VDD5 VDD4 VDD3 VDD2 VDD1 VSS 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85
PD.3 PD.2 PD.1 PD.0 PC.3 PC.2 PC.1 PC.0 PB.3 PB.2 PB.1 PB.0 PA.3 PA.2 PA.1 PA.0 P9.3 P9.2 P9.1 P9.0 P8.3 P8.2 P8.1 P8.0 P7.3 P7.2 P7.1 P7.0 P6.3 P6.2 P6.1 P6.0 P5.3 P5.2 P5.1 P5.0
124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159
84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 Y
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 P4.3 P4.2 P4.1 P4.0 P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0
SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
X
Chip Size Chip Thickness Coordinate Origin Pad Hole Size Pad Size Minimum Pad Pitch
: : : : : :
6.60 mm 6.60 mm 350 mm (typ.) Chip center 100 mm 100 mm 110 mm 110 mm 140 mm
Note: The chip substrate voltage is VSS.
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Semiconductor Pad Coordinates
MSM63188A
Pad Pad Pad Pad No. Name X (m) Y (m) Pad No. Name X (m) Y (m) Pad No. Name X (m) Y (m) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 P4.3 P4.2 P4.1 P4.0 P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0 SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 -2837 -2697 -2557 -2417 -2277 -2137 -1997 -1857 -1717 -1577 -1437 -1297 -1157 -1017 -877 -737 -597 -457 -317 -177 54 194 334 474 614 754 894 1034 1174 1314 1454 1594 1734 1874 2014 2154 2294 2434 2574 2714 3155 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3105 -3010 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 3155 -2870 -2730 -2590 -2450 -2310 -2170 -2030 -1890 -1750 -1610 -1470 -1330 -1190 -1050 -910 -770 -630 -490 -350 -210 -70 70 210 350 490 630 770 910 1050 1190 1330 1470 1610 1750 1890 2030 2170 2310 2450 2590 2730 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 SEG1 SEG0 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 VSS VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDH CB1 CB2 VDD VDDL OSC1 OSC0 RESET XT1 XT0 TST2 TST1 MD MDB VDDI 3155 3155 2705 2565 2425 2285 2145 2005 1865 1725 1585 1445 1305 1165 1025 885 745 605 420 270 120 -30 -179 -329 -479 -629 -779 -929 -1079 -1229 -1379 -1529 -1679 -1829 -1979 -2129 -2324 -2464 -2604 -2744 -2884 2870 3010 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105 3105
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Semiconductor
MSM63188A
Pad Coordinates (continued)
Pad Pad Pad Pad No. Name X (m) Y (m) Pad No. Name X (m) Y (m) Pad No. Name X (m) Y (m) 124 125 126 127 128 129 130 131 132 133 134 135 PD.3 PD.2 PD.1 PD.0 PC.3 PC.2 PC.1 PC.0 PB.3 PB.2 PB.1 PB.0 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 2428 2288 2148 2008 1868 1728 1588 1448 1308 1168 1028 888 136 137 138 139 140 141 142 143 144 145 146 147 PA.3 PA.2 PA.1 PA.0 P9.3 P9.2 P9.1 P9.0 P8.3 P8.2 P8.1 P8.0 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 748 608 468 328 188 48 -92 -232 -372 -512 -652 -792 148 149 150 151 152 153 154 155 156 157 158 159 P7.3 P7.2 P7.1 P7.0 P6.3 P6.2 P6.1 P6.0 P5.3 P5.2 P5.1 P5.0 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -3155 -932 -1072 -1212 -1352 -1492 -1632 -1772 -1912 -2172 -2312 -2452 -2592
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Semiconductor
MSM63188A
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63188A are described in Table 1. A symbol with a slash (/) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, "--" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an inputoutput pin. Table 1 Pin Descriptions (Basic Functions)
Function Symbol VDD VSS VDD1 VDD2 VDD3 VDD4 VDD5 Power Supply C1 C2 VDDI VDDL VDDH CB1 CB2 XT0 XT1 Oscillation OSC0 OSC1 TST1 Test TST2 80 I 76 75 81 I O I Pin 73 62 63 64 65 66 67 68 69 87 74 70 71 72 79 78 -- -- -- -- -- -- -- I O Capacitor connection pins for LCD bias generation. A capacitor (0.1 mF) should be connected between C1 and C2. Positive power supply pin for external interface (power supply for input, output, and input-output ports) Positive power supply pin for internal logic (internally generated). A capacitor (0.1 mF) should be connected between this pin and VSS. Voltage multiplier pin for power supply backup (internally generated). A capacitor (1.0 mF) should be connected between this pin and VSS. Pins to connect a capacitor for voltage multiplier. A capacitor (1.0 mF) should be connected between CB1 and CB2. Low-speed clock oscillation pins. A 32.768 kHz crystal should be connected between XT0 and XT1, and CG (5 to 25 pF) should be connected between XT0 and VSS. High-speed clock oscillation pins. A ceramic resonator and capacitors (CL0, CL1) or external oscillation resistor (ROS) should be connected to these pins. Input pins for testing. A pull-down resistor is internally connected to these pins. The user cannot use these pins. Reset input pin. Setting this pin to "H" level puts this device into a reset state. Reset RESET 77 I Then, setting this pin to "L" level starts executing an instruction from address 0000H. A pull-down resistor is internally connected to this pin. Melody MD MDB 84 85 O O Melody output pin (non-inverted output) Melody output pin (inverted output) -- Type -- -- Positive power supply Negative power supply Power supply pins for LCD bias (internally generated). Capacitors (0.1 mF) should be connected between these pins and VSS. Description
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 Port P3.3 P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 Pin 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 132 131 130 129 128 127 126 125 124 123 122 121 O O O O O O 4-bit output ports. I I Type 4-bit input ports. Description
MSM63188A
Pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit.
P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol P8.0/RD P8.1/WR P8.2 P8.3/INT4 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 Port PB.0/INT0/ TM0CAP/ TM0OVF PB.1/INT0/ TM1CAP/ TM1OVF PB.2/INT0/T02CK PB.3/INT0/T13CK PC.0/INT1/RXD PC.1/INT1/TXC PC.2/INT1/RXC PC.3/INT1/TXD PD.0/FRAME PD.1/LCLK PD.2/TBCCLK PD.3/HSCLK Pin 120 119 118 117 116 115 114 113 112 111 110 109 108 I/O I/O I/O I/O Type 4-bit input-output ports. Description
MSM63188A
In input mode, pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
107 106 105 104 103 102 101 100 99 98 97
I/O
I/O
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG0 SEG1 SEG2 LCD SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 Pin 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 O LCD segment signal output pins O Type Description LCD common signal output pins
MSM63188A
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Semiconductor
MSM63188A
Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 LCD SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 Pin 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 O Type Description LCD segment signal output pins
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Semiconductor Table 2 shows the secondary functions of each pin of the MSM63188A. Table 2 Pin Descriptions (Secondary Functions)
Function Symbol PB.0/INT0 PB.1/INT0 PB.2/INT0 PB.3/INT0 PC.0/INT1 PC.1/INT1 PC.2/INT1 External Interrupt PC.3/INT1 P8.3/INT4 P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 Pin 108 107 106 105 104 103 102 101 117 154 153 152 151 150 149 148 147 I I I I Type Description External 0 interrupt input pins.
MSM63188A
The change of input signal level causes an interrupt to occur. The Port B Interrupt Enable register (PBIE) enables or disables an interrupt for each bit. External 1 interrupt input pins. The change of input signal level causes an interrupt to occur. The Port C Interrupt Enable register (PCIE) enables or disables an interrupt for each bit. External 4 interrupt input pins. The change of input signal level causes an interrupt to occur. External 5 interrupt input pins. The change of input signal level causes an interrupt to occur. The Port 0 Interrupt Enable register (P0IE) and Port 1 Interrupt Enable register (P1IE) enable or disable an interrupt for each bit.
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Semiconductor Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Capture Symbol PB.0/TM0CAP PB.1/TM1CAP PB.0/TM0OVF Timer PB.1/TM1OVF PB.2/T02CK PB.3/T13CK LCD External Expansion Oscillation Output PD.1/LCLK PD.2/TBCCLK PD.3/HSCLK PC.0/RXD PC.1/TXC Serial Port PC.2/RXC PC.3/TXD 102 101 I/O O 99 98 97 104 103 O O O I I/O Clock output pin for LCD driver expansion Low-speed oscillation clock output pin High-speed oscillation clock output pin Serial port receive data input pin Sync serial port clock input-output pin. PD.0/FRAME Pin 108 107 108 107 106 105 100 Type I I O O I I O Description Timer 0 capture input pin. Timer 1 capture input pin. Timer 0 overflow flag output pin. Timer 1 overflow flag output pin. External clock input pin for timer 0 and timer 2. External clock input pin for timer 1 and timer 3. Frame output pin for LCD driver expansion
MSM63188A
Transmit clock output when this device is used as a master processor. Transmit clock input when this device is used as a slave processor. Sync serial port clock input-output pin. Receive clock output when this device is used as a master processor. Receive clock input when this device is used as a slave processor. Serial port transmit data output pin.
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Semiconductor Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Symbol P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 External Memory P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 P8.0/RD P8.1/WR Pin 138 137 136 135 132 131 130 129 128 127 126 125 124 123 122 121 116 115 114 113 112 111 110 109 120 119 O O I/O Data bus for external memory O Type Description Address output bus for external memory
MSM63188A
Read signal output pin for external memory (negative logic) Write signal output pin for external memory (negative logic)
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Semiconductor
MSM63188A
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V) Parameter Power Supply Voltage 1 Power Supply Voltage 2 Power Supply Voltage 3 Power Supply Voltage 4 Power Supply Voltage 5 Power Supply Voltage 6 Power Supply Voltage 7 Power Supply Voltage 8 Power Supply Voltage 9 Input Voltage 1 Input Voltage 2 Output Voltage 1 Output Voltage 2 Output Voltage 3 Output Voltage 4 Output Voltage 5 Output Voltage 6 Output Voltage 7 Output Voltage 8 Storage Temperature Symbol VDD1 VDD2 VDD3 VDD4 VDD5 VDD VDDI VDDH VDDL VIN1 VIN2 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VDD Input, Ta = 25C VDDI Input, Ta = 25C VDD1 Output, Ta = 25C VDD2 Output, Ta = 25C VDD3 Output, Ta = 25C VDD4 Output, Ta = 25C VDD5 Output, Ta = 25C VDD Output, Ta = 25C VDDI Output, Ta = 25C VDDH Output, Ta = 25C -- Rating -0.3 to +1.6 -0.3 to +2.9 -0.3 to +4.2 -0.3 to +5.5 -0.3 to +6.8 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDD1 + 0.3 -0.3 to VDD2 + 0.3 -0.3 to VDD3 + 0.3 -0.3 to VDD4 + 0.3 -0.3 to VDD5 + 0.3 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDDH + 0.3 -55 to +150 Unit V V V V V V V V V V V V V V V V V V V C
17/32
Semiconductor
MSM63188A
RECOMMENDED OPERATING CONDITIONS
* When backup is used
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Ceramic Oscillation Frequency External RC Oscillator Resistance Symbol Top VDD VDDI fXT fCM ROS Condition -- -- -- -- VDD = 1.2 to 2.7 V VDD = 1.5 to 2.7 V VDD = 1.2 to 2.7 V VDD = 1.5 to 2.7 V Range -20 to +70 0.9 to 2.7 0.9 to 5.5 30 to 35 300k to 500k 200k to 1M 100 to 300 50 to 300 Unit C V V kHz Hz kW
* When backup is not used
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Ceramic Oscillation Frequency Symbol Top VDD VDDI fXT fCM Condition -- -- -- -- VDD = 1.8 to 5.5 V VDD = 2.2 to 5.5 V VDD = 2.7 to 5.5 V VDD = 1.8 to 5.5 V External RC Oscillator Resistance ROS VDD = 2.2 to 5.5 V VDD = 2.7 to 5.5 V Range -20 to +70 1.8 to 5.5 1.8 to 5.5 30 to 35 300k to 500k 300k to 1M 200k to 2M 100 to 300 50 to 300 30 to 300 kW Hz Unit C V V kHz
18/32
Semiconductor
MSM63188A
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter VDD2 Voltage VDD2 Voltage Temperature Deviation VDD1 Voltage VDD3 Voltage (VDD = VDDI = 0.9 to 5.5 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) MeaMin. Typ. Max. Unit suring Symbol Condition Circuit 1/5 bias, 1/4 bias VDD2 1.7 1.8 1.9 V (Ta = 25C) DVDD2 VDD1 VDD3 -- 1/5 bias, 1/4 bias 1/5 bias 1/4 bias (connect VDD3 and VDD2) VDD4 Voltage VDD5 Voltage VDD4 VDD5 1/5 bias 1/4 bias 1/5 bias 1/4 bias High-speed clock oscillation stopped VDD = 1.5 V High-speed clock oscillation (Ceramic oscillation, 1 MHz) VDD = 1.5 V High-speed clock oscillation stopped High-speed clock oscillation (VDD = 1.2 to 5.5 V) Oscillation start time: within 5 seconds Backup Backup not used -- -- -- CSA2.00MG (Murata MFG.-make) used VDD = 3.0 V -- VDD = 1.5 V VDD = 3.0 V VDD = 1.5 V VDD = 3.0 V -- -4 -- mV/C V V Typ.- 0.2 1/2 VDD2 Typ.+ 0.2 Typ.- 0.3 3/2 VDD2 Typ.+ 0.3 Typ.- 0.2 VDD2 Typ.+ 0.2
Typ.- 0.4 2 VDD2 Typ.+ 0.4 Typ.- 0.3 3/2 VDD2 Typ.+ 0.3 Typ.- 0.5 5/2 VDD2 Typ.+ 0.5 Typ.- 0.4 2 VDD2 Typ.+ 0.4 2.8 -- 3.0
V V
V
VDDH Voltage (Backup used)
VDDH
2.0
--
2.7
V 1
0.8 1.2 1.0 0.9 1.7 0.1 5 20 -- 8 0.0 0.0 1.2 2.0
1.3 -- -- -- -- -- -- 25 30 12 -- -- -- --
1.8 5.5 -- -- -- 5.0 25 30 -- 16 0.4 0.7 1.5 3.0
V V V V V ms pF pF pF pF V V V V
VDDL Voltage
VDDL
Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detect Time External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance External Ceramic Oscillator Capacitance Internal RC Oscillator Capacitance POR Voltage Non-POR Voltage
VSTA VHOLD TSTOP CG CD CL0, 1 COS VPOR1 VPOR2
Notes: 1. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs. 2. "POR" denotes Power On Reset. 3. "VPOR1" indicates that POR occurs when VDD falls from VDD to VPOR1 and again rises up to VDD. 4. "VPOR2" indicates that POR does not occur when VDD falls from VDD to VPOR2 and again rises up to VDD. 19/32
Semiconductor DC Characteristics (continued) * When backup is used
MSM63188A
(VDD = VDDI = 1.5 V, VSS = 0 V, 1/5 bias, Ta = -20 to +70C unless otherwise specified) MeaParameter Symbol Condition Min. Typ. Max. Unit suring Circuit CPU is in HALT state. 5.6 7.0 Ta = -20 to +50C -- mA Supply Current 1 IDD1 (High-speed clock oscillation 5.6 8.5 Ta = -20 to +70C -- stopped) CPU is in HALT state. Ta = -20 to +50C LCD is in Power Down mode. (High-speed clock oscillation Ta = -20 to +70C stopped) CPU is in operation at low-speed oscillation. (High-speed clock oscillation stopped) CPU is in operation at high-speed oscillation (RC oscillation, f = approx. 720 kHz, ROS = 51 kW) CPU is in operation at high-speed oscillation (Ceramic oscillation, 1 MHz) -- -- -- -- -- 4.5 4.5 18 700 800 5.5 mA 7.0 1 22 900 1000 mA mA mA
Supply Current 2
IDD2
Supply Current 3 Supply Current 4 Supply Current 5
IDD3 IDD4 IDD5
* When backup is not used
(VDD = VDDI = 3.0 V, VSS = 0 V, 1/5 bias, Ta = -20 to +70C unless otherwise specified) MeaParameter Symbol Condition Min. Typ. Max. Unit suring Circuit CPU is in HALT state. 2.7 3.0 Ta = -20 to +50C -- mA Supply Current 1 IDD1 (High-speed clock oscillation Ta = -20 to +70C -- 2.7 3.5 stopped) CPU is in HALT state. Ta = -20 to +50C LCD is in Power Down mode. (High-speed clock oscillation Ta = -20 to +70C stopped) CPU is in operation at low-speed oscillation. (High-speed clock oscillation stopped) CPU is in operation at high-speed oscillation (RC oscillation) f = approx. 800 kHz, ROS = 51 kW f = approx. 500 kHz, ROS = 100 kW -- -- -- -- -- -- 2.1 2.1 8.5 550 390 1000 2.4 mA 3.0 10.5 800 mA 450 1500 mA mA 1
Supply Current 2
IDD2
Supply Current 3
IDD3
Supply Current 4
IDD4
Supply Current 5
IDD5
CPU is in operation at high-speed oscillation (Ceramic oscillation, 2 MHz)
20/32
Semiconductor DC Characteristics (continued)
MSM63188A
Parameter Output Current 1 (P2.0 to P2.3) (P3.0 to P3.3) (P4.0 to P4.3) (PC.0 to PC.3) (PD.0 to PD.3) Output Current 2 (MD, MDB) ***
Symbol
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = -20 to +70C unless otherwise specified) MeaCondition Min. Typ. Max. Unit suring Circuit VDDI = 1.5 V -2.0 -5.0 -8.0 0.2 1.0 1.5 -2.5 -6.0 -9.0 0.4 2.0 3.0 -- 4 -- 4 -- 4 -- 4 -- 4 -2.5 -3.5 0.75 1.0 -300 -450 60 100 -- -1.2 -3.0 -4.0 1.2 3.0 4.0 -1.3 -4.0 -5.5 1.3 4.0 5.5 -- -- -- -- -- -- -- -- -- -- -1.5 -2.0 1.5 2.0 -180 -280 120 200 -- -0.2 -1.0 -1.5 2.0 5.0 8.0 -0.4 -2.0 -3.0 2.5 6.0 9.0 -4 -- -4 -- -4 -- -4 -- -4 -- -0.75 -1.0 2.5 3.5 -60 -100 300 450 0.3 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 2 VOH1 = VDDI - 0.5 V VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V
IOH1
IOL1
VOL1 = 0.5 V
VDDI = 3.0 V VDDI = 5.0 V VDD = 1.5 V
IOH2
VOH2 = VDD - 0.7 V
VDD = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V
IOL2 Output Current 3 (SEG0 to SEG63) (COM1 to COM16) IOH3 IOHM3 IOHM3S IOMH3 IOMH3S IOML3 IOML3S IOLM3 IOLM3S IOL3 Output Current 4 (OSC1) IOH4R IOL4R IOH4C IOL4C Output Leakage (P2.0 to P2.3) (P3.0 to P3.3) (P4.0 to P4.3) (PD.0 to PD.3) ***
VOL2 = 0.7 V
VDD = 3.0 V VDD = VDDH = 5.0 V
VOH3 = VDD5 - 0.2 V (VDD5 level) VOHM3 = VDD4 + 0.2 V (VDD4 level) VOHM3S = VDD4 - 0.2 V (VDD4 level) VOMH3 = VDD3 + 0.2 V (VDD3 level) VOMH3S = VDD3 - 0.2 V (VDD3 level) VOML3 = VDD2 + 0.2 V (VDD2 level) VOML3S = VDD2 - 0.2 V (VDD2 level) VOLM3 = VDD1 + 0.2 V (VDD1 level) VOLM3S = VDD1 - 0.2 V (VDD1 level) VOL3 = VSS + 0.2 V (VSS level) VOH4R = VDDH - 0.5 V VDD = VDDH = 3.0 V (RC oscillation) VOL4R = 0.5 V (RC oscillation) (ceramic oscillation) VOL4C = 0.5 V (ceramic oscillation) VOH = VDDI VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V
VOH4C = VDDH - 0.5 V VDD = VDDH = 3.0 V
IOOH
IOOL
VOL = VSS
-0.3
--
--
mA
21/32
Semiconductor DC Characteristics (continued)
MSM63188A
Parameter Input Current 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PD.0 to PD.3) *** Input Current 2 (OSC0) Input Current 3 (RESET) Input Current 4 (TST1, TST2)
Symbol
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = -20 to +70C unless otherwise specified) MeaCondition Min. Typ. Max. Unit suring Circuit VIH1 = VDDI (when pulled down) VIL1 = VSS (when pulled up) VDDI = 1.5 V VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V VDDI = 3.0 V VDDI = 5.0 V 2 30 70 -30 -180 -600 0.0 -1.0 -200 -600 0.0 -1.0 0.1 0.75 -1.0 -3.0 10 150 0.5 -1.0 VDD = 1.5 V 50 0.5 1.25 -1.0 VDD = 3.0 V VDD = VDDH = 5.0 V 10 90 250 -10 -90 -250 -- -- -110 -350 -- -- 0.5 1.5 -0.5 -1.5 50 350 1.0 -- 150 1.0 2.5 -- 30 180 600 -2 -30 -70 1.0 0.0 -30 -150 1.0 0.0 1.0 3.0 -0.1 -0.75 80 600 2.0 0.0 300 1.5 4.0 0.0 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 3
IIH1
IIL1 IIH1Z IIL1Z IIL2 IIH2R IIL2R IIH2C IIL2C
VIH1 = VDDI (in a high impedance state) VIL1 = VSS (in a high impedance state) VIL2 = VSS (when pulled up) VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V
VIH2R = VDDH (RC oscillation) VIL2R = VSS (RC oscillation) VIH2C = VDDH VIL2C = VSS VDD = VDDH = 3.0 V VDD = VDDH = 3.0 V VDD = 1.5 V (ceramic oscillation) VDD = VDDH = 5.0 V (ceramic oscillation) VDD = VDDH = 5.0 V VIH3 = VDD VIL3 = VSS VIH4 = VDD VIL4 = VSS VDD = 3.0 V VDD = VDDH = 5.0 V
IIH3 IIL3 IIH4 IIL4
22/32
Semiconductor DC Characteristics (continued)
MSM63188A
Parameter Input Voltage 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PD.0 to PD.3) Input Voltage 2 (OSC0) *** Input Voltage 3 (RESET, TST1, TST2) Hysteresis Width 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (PD.0 to PD.3) Hysteresis Width 2 (RESET, TST1, TST2) Input Pin Capacitance (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PC.0 to PC.3) (PD.0 to PD.3) *** ***
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = -20 to +70C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit VDDI = 1.5 V VIH1 VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V VIL1 VDDI = 3.0 V VDDI = 5.0 V VIH2 VIL2 VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VIH3 VDD = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VIL3 VDD = 3.0 V VDD = VDDH = 5.0 V VDDI = 1.5 V DVT1 VDDI = 3.0 V VDDI = 5.0 V VDD = 1.5 V DVT2 VDD = 3.0 V VDD = VDDH = 5.0 V 1.2 2.4 4.0 0.0 0.0 0.0 2.4 4.0 0.0 0.0 1.35 2.4 4.0 0.0 0.0 0.0 0.05 0.2 0.25 0.05 0.2 0.25 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.1 0.5 1.0 0.1 0.5 1.0 1.5 3.0 5.0 0.3 0.6 1.0 3.0 5.0 0.6 1.0 1.5 3.0 5.0 0.15 0.6 1.0 0.3 1.0 1.5 0.3 1.0 1.5 V V V V V V V V V V V V V V V V V V V V V V 4
CIN
--
--
--
5
pF
1
23/32
Semiconductor Measuring circuit 1
MSM63188A
CB1 Cb12 CB2 C1 C12 C2 q *1 w OSC0 OSC1 VSS VDD VDDI VDD1 A Ca V Ca, Cb, Cc, Cd, Ce, Cl, C12 Cb12, Ch CG CL0 CL1 Ceramic Resonator VDD2 Cb V VDD3 Cc V VDD4 Cd V VDD5 Ce V VDDH VDDL Ch V Cl V XT0 XT1
CG
32.768 kHz Crystal
: 0.1 mF : 1 mF : 15 pF : 30 pF : 30 pF : CSA2.00MG (2 MHz) CSB1000J (1 MHz) (Murata MFG.-make)
*1 RC Oscillator q ROS w Ceramic Oscillator q CL0 CL1 Ceramic Resonator w
Measuring circuit 2
*3 VIH
*2 INPUT OUTPUT
A
VIL
VSS
VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
*2 Input logic circuit to determine the specified measuring conditions. *3 Measured at the specified output pins.
24/32
Semiconductor Measuring circuit 3
*4
MSM63188A
A INPUT OUTPUT
VSS VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
Measuring circuit 4
VIH Waveform Monitoring *4 INPUT OUTPUT
VIL
VSS
VDD
VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
*4 Measured at the specified input pins.
25/32
Semiconductor AC Characteristics (Serial Interface, Serial Port)
MSM63188A
(VDD = 0.9 to 5.5 V, VDDH = 1.8 to 5.5 V, VSS = 0 V, VDDI = 5.0 V, Ta = -20 to +70C unless otherwise specified) (1) Synchronous Communication
Parameter TXC/RXC Input Fall Time TXC/RXC Input Rise Time TXC/RXC Input "L" Level Pulse Width TXC/RXC Input "H" Level Pulse Width TXC/RXC Input Cycle Time TXC/RXC Output Cycle Time tCYC2(O) TXD Output Delay Time RXD Input Setup Time RXD Input Hold Time tDDR tDS tDH Symbol tf tr tCWL tCWH tCYC tCYC1(O) Condition -- -- -- -- -- CPU in operation state at 32 kHz CPU in operation at 2 MHz VDD = VDDH = 2.7 V to 5.5 V Output load capacitance 10 pF -- -- Min. -- -- 0.8 0.8 2.0 -- -- -- 0.5 0.8 Typ. -- -- -- -- -- 30.5 0.5 -- -- -- Max. 1.0 1.0 -- -- -- -- -- 0.4 -- -- Unit ms ms ms ms ms ms ms ms ms ms
Synchronous communication timing ("H" level = 4.0 V, "L" level = 1.0 V)
tCYC TXC (PC.1)/ RXC (PC.2) tr tCWH tDDR TXD (PC.3) tDS RXD (PC.0) tDH tDS 5 V (VDDI) 0 V (VSS) tDDR 5 V (VDDI) 0 V (VSS) tf tCWL 5 V (VDDI) 0 V (VSS)
26/32
Semiconductor (2) UART Communication
MSM63188A
Parameter Transmit Baud Rate Receive Baud Rate
Symbol TBRT RBRT
Condition TBRT = 1/fBRT TCR = 1/fOSC RBRT = 1/fBRT
Min. TBRT-TCR RBRT0.97
Typ. TBRT RBRT
Max. TBRT+TCR RBRT1.03
Unit s s
fBRT: Baud rates (1200, 2400, 4800, 9600 bps)
UART communication timing ("H" level = 4.0 V, "L" level = 1.0 V)
TBRT TXD (PC.3) RBRT RXD (PC.0) 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS)
27/32
Semiconductor AC Characteristics (External Memory Interface)
MSM63188A
(VDD = 0.9 to 5.5 V, VDDH = 1.8 to 5.5 V, VSS = 0 V, VDDI = 5.0 V, Ta = -20 to +70C unless otherwise specified) (1) Reading from External Memory
(a) When CPU operates at 32.768 kHz Parameter Read Cycle Time RD Output Delay Time Output Valid Time
External Memory Output Delay Time
Symbol tRC tOE tOHA tDO
Condition -- -- -- --
Min. -- -- -- --
Typ. 61.0 -- -- --
Max. -- 5.0 5.0 5.0
Unit ms ms ms ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V) Parameter Read Cycle Time RD Output Delay Time Output Valid Time
External Memory Output Delay Time
Symbol tRC tOE tOHA tDO
Condition -- -- -- --
Min. 1.0 -- -- --
Typ. -- -- -- --
Max. -- 100 100 150
Unit ms ns ns ns
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB obj, xadr16 MOVXB obj, [RA] S1 System clock tRC P7 - P4 (A15 - A0) P8.0 (RD) tOE PA, P9 (D7 - D0) Port setup value Input data tDO tOHA Port setup value 5 V (VDDI) 0 V (VSS) Port setup value Address output Port setup value 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) S2 S1 S2 S1 S2
28/32
Semiconductor (2) Writing to External Memory
(a) When CPU operates at 32.768 kHz Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. -- -- -- -- -- -- Typ. 61.0 30.5 15.3 15.3 45.8 15.3
MSM63188A
Max. -- -- -- -- -- --
Unit ms ms ms ms ms ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V) Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. 1.0 0.4 0.2 0.2 0.7 0.2 Typ. -- -- -- -- -- -- Max. -- -- -- -- -- -- Unit ms ms ms ms ms ms
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB [RA], obj or MOVXB xadr16, obj S1 System clock tWC P7 - P4 (A15 - A0) PA, P9 (D7 - D0) Port setup value Address output Port setup value 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) tAS tW tWR S2 S1 S2 S1 S2
Port setup value
Output data tDS tDH
Port setup value
P8.1 (WR)
29/32
Semiconductor
MSM63188A
APPLICATION CIRCUITS
*RC oscillation is selected as high-speed oscillation. *Ports are powered from external memory power source. *Cv is an IC power supply bypass capacitor. *Values of Ca, Cb, Cc, Cd, Ce, Cl, Cb12, C12, Ch, and CG, are for reference only. SEG0-63 OSC0 ROS 5 to 25 pF 1.5 V Ch 1.0 mF XT1 VDDH VDD Cv 0.1 mF 1.0 mF Cb12 Cl 0.1 mF Ce Cd Cc Cb Ca C12 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF Push SW Open Buzzer C2 RESET TST1 TST2 MD MDB VSS CB1 CB2 VDDL VDD5 VDD4 VDD3 VDD2 VDD1 C1 OSC1
LCD
Crystal 32.768 kHz CG
COM1-16 XT0
P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0
SW Matrix (8 8)
MSM63188A
P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0
VDDI VDD P4-7 P9, PA P8.0 P8.1 A15-0 External D7-0 Memory RD (64K 8 bits) WR VSS 5.0 V
Note: VDDI is the power supply pin for the input, output, and input-output ports. Be sure to connect the VDDI pin either to the positive power supply pin (VDD) of this device or to the positive power supply pin of the external memory. Application Circuit Example with Power Supply Backup
30/32
Semiconductor
MSM63188A
APPLICATION CIRCUITS (continued)
*Ceramic oscillation is selected as high-speed oscillation. *Ports, external memory, and IC share their power supply. *Cv is an IC power supply bypass capacitor. *Values of Ca, Cb, Cc, Cd, Ce, Cl, C12, CG, CL0, and CL1 are for reference only. SEG0-63 OSC0 OSC1 CL1 30 pF CL0 30 pF Ceramic Resonator (Example: 1 MHz)
LCD
Crystal 32.768 kHz CG VDD 5.0 V
COM1-16 XT0 XT1 VDDH VDD
5 to 25 pF
Cv 0.1 mF Open Cl 0.1 mF Ce Cd Cc Cb Ca C12 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF
CB1 CB2 VDDL VDD5 VDD4 VDD3 VDD2 VDD1 C1
P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0
SW Matrix (8 8)
MSM63188A
0.1 mF Push SW Open C2 RESET TST1 TST2 MD MDB VSS
P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0
Buzzer
VDDI VDD P4-7 P9, PA P8.0 P8.1 A15-0 External D7-0 Memory RD (64K 8 bits) WR VSS
VDD
Note: VDDI is the power supply pin for the input, output, and input-output ports. Be sure to connect the VDDI pin either to the positive power supply pin (VDD) of this device or to the positive power supply pin of the external memory. Application Circuit Example with No Power Supply Backup
31/32
Semiconductor
MSM63188A
PACKAGE DIMENSIONS
(Unit : mm) LQFP176-P-2424-0.50-BK
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.87 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 32/32
E2Y0002-29-62
NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission. MS-DOS is a registered trademark of Microsoft Corporation.
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Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan


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